Loss–Tj loop
Iterates loss and temperature to the operating point, or reports runaway.
Losses raise temperature and temperature raises losses. Solve both together, with the board in the model.
The Electro-thermal module computes the junction temperature of power semiconductors with the loss-temperature loop closed: conduction loss rises with temperature, which raises the temperature again, and the module iterates to the operating point or flags thermal runaway. It models PCB copper spreading and heatsinks, imports Foster and Cauer thermal networks from datasheets, and for linear boards gives a board thermal resistance with a guaranteed upper and lower bound.
Iterates loss and temperature to the operating point, or reports runaway.
Copper area, layers and vias in a thermal finite-element model of the board.
Use the device's datasheet thermal network for transient Tj.
For linear boards, a board thermal resistance bracketed between proven bounds.
Junction temperature itself is an estimate (device and heatsink interaction cannot be bounded); only the board Rth bracket is bounded.
Every module ships with reference cases that run in our CI. See validation for how results are checked.
Fit GaN and SiC FET models from datasheet curves, run a virtual double-pulse test, and get Eon/Eoff switching-loss tables with uncertainty bands.
From input and output specs to candidate converter topologies, real parts and an efficiency, volume and cost Pareto front with error bands, each design verified by an exact steady-state simulation.
Design inductors and transformers in the browser: pick a core and material, size the winding, and get core and winding loss, leakage inductance, saturation margin and temperature rise.
Yes. If the loss-temperature loop has no stable operating point, the module flags runaway instead of returning a temperature.
Yes. Foster and Cauer networks can be imported for transient junction-temperature calculation.